中文版请点击：高性能PCB设计的工程实现

Abstract:

In this article, the author describes the design of high-performance PCB in details integrating with the powerful functions of Cadence software, guides to Engineering Implementation of High Performance PCB Design.

Text:

Following the Moore’s law, the products in the electronics industry tend to be more powerful, complicate, with a higher integration level, higher speed and shorter R&D cycle. The PCB design also meets a booming age of high-speed PCB design. PCB is not only a carrier to realize the interconnection, but also a very important component for all of electronics products. In this article, with an overview of high-performance PCB design, all of the aspects about design of high-performance PCB will be discussed.

First of all, successful high-performance PCB design heavily depends on a team of experienced PCB design experts.

I. Suggestions about organization of PCB design team

With the high-speed development of PCB design, professional PCB engineers have come into existence in charge of PCB design instead of the hardware engineers, while both schematic and PCB design were done by hardware engineers alone.

A well-rounded large and middle-sized PCB design team shall consist of the following:

Library engineers: they shall be specialized in creating PCB footprints, having a good knowledge of technological capacity and technical parameters of main board and chip manufacturers at present, and completing the footprint of high-speed and high-precision PCB according to the practical conditions of products of this company.

PCB design engineers: they shall have a wide range of knowledge about PCB, including basic knowledge about electronic circuits, general knowledge about production of PCB, processing of SMT, and DFX (DFM/DFC/DFT). Furthermore, they should know about the stackup design, impedance control, signal integrality analyse and EMC knowledge about high-speed PCB, take into account all kinds of requirements for modern PCB design and complete the placement and routing for PCB.

SI engineers: they shall have the ability to reveal the “concealed schematic diagram” in the PCB transmission line, and deal with the problems of reflection, crosstalk and timing in high-speed development. In addition, they shall carry out detailed simulation to ensure the quality of signal, raise the one-time success rate of products, and ensure PCB a stable and reliable operation.

EMC engineers: they, as required, are in charge of EMC design relevant to circuits, components and PCB , reducing the radiation and enhancing the ability to reduce and tolerate the interference from outside.

Thermal engineers: the thermal engineers are absolutely necessary for a R&D team in pursuit of products with a small and exquisite structure. They are able to ensure the products a stable and reliable operation by analyzing the distribution of heat sources, designing a suitable duct system and controlling the temperature in the system. Therefore, without thermal engineers, it is impossible to design the notebook computer with high performance and stability. (Notes: the structural engineer is concurrently in charge of thermal simulation and design of PCB in some companies).

Process engineers: they are responsible for working out the technological parameters of PCB design for their company according to the technological capacity of PCB manufacturers, assembly providers. They also participate in design of some board and PCB designs to ensure the production and processing of PCB.

For the sake of communication, technological advancement as well as personnel backup, each type of engineers as mentioned above shall be no less than 3 persons. For those companies with limited resources and uncertain needs for research and development, they may as well reserve some interdisciplinary talents and seek suitable outside resources to make up for the disadvantage in research and development.

Let us have a look at the organization course of PCB design team of IT industry:
In 1980, the hardware engineers are in charge of PCB design;
In 1990, CAD engineers come into existence in a special department;
In 1995, professional PCB design house comes into vogue in North America and Japan;
In 2000, with increasing specialized division of work, PCB design, SI, EMC, thermal design and technique etc are separated form each other. More than 50% of PCB design in North America and Japan is completed by professional design companies. Furthermore, SI and EMC and so on gradually function under a system of its own.
In 2003, some professional design companies in the wake of Shenzhen EDADOC Technology CO., LTD take the concept of PCB design outsourcing into China;
In 2008, within companies, a definitive division of work, complete types of work, suitable outsourcing and technological outsourcing come into fashion.

II.Indispensable basic knowledge about hardware for design of high-performance PCB

Since the design of PCB comes in an age of high-speed design, the knowledge about signal integrity based on the theory of transmission line comes into vogue instead of the basic knowledge in hardware. It has been pointed out that after ten years the design in hardware includes only front end and back end (front end refers to IC design while back end refers to PCB design), so the design is easily completed if a system engineer pieces them up. This would cast doubt on the necessity to study basic knowledge of hardware. In fact, the engineers, whether IC or PCB engineer, shall all master such knowledge as R, L, C and basic gate circuits.

The design of high-performance PCB cannot do without basic knowledge of power supply as well as general knowledge of FPGA. Even the analysis of signal integrity based on the theory of transmission line also researches into the elements like R, L and C.

The design engineers of PCB shall possess basic knowledge of circuits, such as high and low frequency, digital circuit, microwave, electromagnetic field and wave etc. Having a good knowledge of basic functions of products designed as well as basic knowledge in hardware is a basic requirement for design of high-performance PCB.

III. Challenges of the design of high-performance PCB

The design of PCB is a kind of art with endless improvement. An excellent design of PCB will be faced with the following challenges:

1.Challenge of the R&D cycle

It has been revealed that for notebook computers, generally it takes half a year to come into the market from item declaration. However, for mobile phones, it takes only three months on average. Therefore, as part of product research and development, the time for design of PCB is increasingly reduced.
In April 1985, Toshiba Corporation designs a mini-machine named T1100 which gives an impetus to the industry of computer. Since then, the R&D cycle for main board of computer is improved greatly.

Figure 1: Change of design cycle for main board of computer

In EDADOC, the design time for PCB of notebook is basically confined within 3 weeks, and the design time for mobile phone PCB is generally 10 ten days as expected by customers.

How do PCB engineers deal with the challenge that the R&D cycle decreases continuously due to market competition?

First, Use top-ranking EDA design software

High-effect EDA tool software brings not only a rise in efficiency but also a brand-new design concept. Among all types of EDA tool software, series of SPB from Cadence undoubtedly take the lead in the industry. From design by a single engineer ten years ago, to subsequent “sub-drawing” and to today’s “partition”, Cadence Allegro provides the parallel design by multiple engineers, which enables the formerly impossible R&D cycle to become reality. In EDADOC, the parallel design is adopted for 92% of PCB design.

For instance, EDADOC once completes SI simulation, placement and routing for one XDSL PCB board with 20000PIN in 6 days, which mainly owes its success to the parallel design.

Take PCB design for main board of common notebook as an example, and let us compare the main PCB design data between traditional work mode of “design by one PCB engineer”, 3-shift work mode adopted by some companies, and the work mode of parallel design:

Work Modes	Design by one engineer	Three shifts by three engineers	Parallel Design
Design Time	30 days	18 days	15 days
Advantage	Single engineer in charge, without having to hand over work halfway, with low communication cost	Short delivery time, and wisdom from multiple engineers	Short delivery time, with multiple engineers working together, easy communication, and wisdom from multiple engineers
Disadvantage	long cycle, and limited by personal knowledge	It is difficult for engineers to accept the work mode, low efficiency in night shift, inconvenient communication with surrounding resources	Asking for a certain scale of team, with a slightly low efficiency
Scope of application	For small companies of simple single boards	For complicated boards without having to communicate with surrounding resources. In combination with parallel design in some special cases	For complicated or relatively complicated boards, with a short design cycle. Widely used for large and middle-sized EDA teams

Second, Advanced R&D process , reduced redo work

At the stage of overall plan design, PCB engineers step into the research and development, mainly including design and demonstration of system structure of products. At the stage of overall design, they evaluate the feasibility of earlier PCB design. At the stage of detailed design, they work out a plan of Synchronization schematic design and participate in choosing components, structural design and thermal design, so that, when starting the design of PCB, they can simplify the main work, and at the same time reduce the redo work which due to oversized component, insufficient driving capacity and infeasible topology plan and structural heat dispersion etc in the course of PCB design.

Third. Design concept for “succeed in the first time”

Senior consultants of IBM once point out the problems in some domestic R&D team, “you have no time to do the work well with one time but have time to do it again and again”. Against the background of market competition, experienced PCB design engineers, together with a well-rounded design flow and top-class EDA tools, will ensure the commonly-called “succeed in the first time”, which would save not only the cost for PCBs but also the whole R & D design Period. Therefore, in order to win the opportunity for market, both PCB designer and PM shall keep in mind the concept of “succeed in the first time”. .

Finally, Reusing Modules, Technology accumulation.

Many domestic well-known companies the author got in touch with pay great attention to the module reuse so they achieve a sound technological accumulation and effectively reduce the design time for PCB at the same time.

All in a word, we shall, in the design concept, participate in R&D in advance, adopt the work mode of parallel design and “succeed in the first time”, reduce the cycle of R&D and use such advanced software as Cadence Allegro. We can solve the problem of R&D cycle of PCB without excessive overtime work, two-shift and three-shift work modes.

2.Challenges of the cost

The cost for PCB consists of explicit cost and implicit cost

The explicit cost mainly includes production cost of PCB and cost of PCBA.

In regard to control of explicit cost, we can reduce the explicit cost for design of PCB by having a good knowledge of technological capacity of common PCB factory and the technological requirements for chip devices, selecting suitable layers and setting proper stackup and design parameters.

The implicit cost includes cost of labor, technological risks and time cost during design of PCB, especially the opportunity cost for coming into the market.

In fact the implicit cost for design of PCB is much larger than the explicit cost.

For example, the opportunity for the market of mobile phones is about half a year. If one more research and development has to be carried out due to problems existing in PCB design, for fashionable mobile phones it means not only a time loss of one month or two but also an absolute failure for them.

With regard to control of implicit cost, the senior managers and chief manager in charge of R & D shall possess the concept of “paying close attention to important points, easing control over unimportant ones, and achieving win-win cooperation and one-time success”. At the first stage of design, they shall take the cost into account, and seek suitable outside resources to reduce the implicit cost in product research and development.

3.Challenges of high speed

Rising of the high-frequency and high speed, signal integrity is being a trouble to R & D, including driving capacity, and the reflection, crosstalk, overshoot, ring-back and attenuation etc. The simulation module Signoise in Allegro is based on IBIS model, and able to be easily used to build a topology for simulation.

The simulation tool in Allegro has a good interfaces with the routing platform. After the routing for is completed, the parameters on the PCB can be directly transfer to Signoise platform.

The layout constraint gotten by simulation can be directly sent into the electric-rule manager in Allegro which can constrain the Length matching rules. In the course of layout, if the length is not consistent with the specified rule, Allegro will give an real-time alarm.

Drawing 2: Example for constrain manager

As shown in the above, if the length is within the specified range, the corresponding field in the table will turn green. If not, whether shorter or longer, the corresponding field in the table will becomes red.

4.Challenges of high density

Let’s have a look at a group of data:
Change in the packaging of devices in recent years:

Changes in the PIN number of component and the total PIN number of PCB in the IT industry over the past 20 years ：

Drawing 3: Changes in the PIN number of component and the PIN number of PCB

Changes in the layers of PCB in the IT industry over the past 20 years :

Drawing 4: Changes in the layer number of single boards

Changes in PIN density (Pin density, Pins/sq in) of single boards over the past 20 years:

Drawing 5: Changes in PIN density

According to the above diagram, we can learn that the design density of PCB tends to become higher. When we went from boards full of jumping wires 20 years ago, to subsequent double-sided boards and multilayer boards and to packaging changes of devices as well as the booming HDI technology promoted by the industry of mobile phones in recent years including Menlow platform introduced by Intel recently, HDI technology has been widely used in PC industry.

With increasing promotion of design density of PCB, PCB engineers have to keep pace with the frontier fields of scientific research in the industry, have a good knowledge of new materials and technologies and adopt advanced EDA software supporting high-precision PCB design so that they can meet the challenges facing the increasing density in the course of product research and development. It is said that SPB 16.2 introduced soon will have a great breakthrough in the design of HDI, which we are looking forward to.

5.Challenges of the power supply and ground noise

Due to the fact that the power supply and ground plane serve as the reference plane and return path for signal lines, the noise from power supply and ground will directly affect the signal. Avoiding the effect of power supply and ground noise on the signal plays an important role in stabilizing the electrical level of power supply, and ensuring the reliability of high-speed signal.

To design the power supply for high-speed PCB, we have to be aware of the power supply tree and analyze the reasonableness of channels for power supply.

First of all, if the trace have to carry a large current, we should set aside a surplus before allotting a width for trace laying. In addition, due to the fact that the resistance exists in the trace, there will be a voltage drop at the trace from the output terminal of power supply to the actual load. But the voltage of high-speed circuit devices, especially Core voltage, is very low generally, so the voltage drop will have a direct effect on the power supply. The capacity of carrying current is related to the width of trace, inner and outer layers, thickness of copper and the allowable temperature rise.

Second, consideration must be given to the impedance of power supply so as to ensure the filtering for power supply. The channels for power supply have resistance and impedance, and the momentary power supply need to be supplied for the high-speed circuit when it is switched at the gate. So it will take some time for the electric current to provide energy for the high-speed circuit being switched at each circuit gate step by step, which can be thought of as a course of multi-step electric charging.

Drawing 6: Routes for power supply

As shown in the drawing, in the state of high frequency, the current at the pins of device is first supplied by the plate-type capacitor exposed of a power supply and ground plane because the power supply system consisting of them has the lowest impedance and a fastest power supply. But, this plate-type capacitor stores a very small electric quantity that is supplied by small capacitors of which the electric charges are provided by a big energy storage BULK capacitor. Then the switching power supply will charge BULK capacitor via electric current channels. The reasons for the above are that the switching power supply is of low impedance only when the frequency is thousands of Hz; the BULK capacitor is of low impedance only when the frequency is of MHz; the small capacitors are of low impedance only when the frequency is between scores of and hundreds of MHz. So, only by multi-step electric charging can the electric current reach the pins of device to meet the needs for momentary power supply. Furthermore, Cadence provides a PI analysis module used to analyze the impedance of power supply at different power consumption and check whether the selection of capacitors is proper or not.

The theoretical basis for PI simulation tool refers to that the transmission line is used to divide the power supply level in the form of limited elements, and make the power supply and the relevant ground plane into a pair of plate-type capacitors, which are divided into several portions as shown in the drawing:

After frequency domain analysis, the tool is used to analyze the impedance of each small block on the plate-type capacitor and achieve the impedance drawings for each point finally.

If the impedance of some point exceeds the target impedance, the power supply level needs to be re-distributed, or some filtering capacitors need to be added to reduce the target impedance of the point and enhance the ability to filter the waves at the pins of devices.

6.Challenges of EMC

In an age when people have an increasing standard of living and pay close attention to environmental protection relevant to electromagnetic pollution etc, EMC problems have become part of research and development for all of the electronic products. As a “Black Magic”, EMC problems tend to give more trouble to engineers.

EMC has to be given consideration to at the headstream. As the headstream of EMC of products , EMC performance of PCB has been paid more attention to. Among many EMC indices, RE is the most difficult for hardware engineers to deal with.

Due to restrictions of model, even top-class EMC simulation software can not provide the data comparable with the actually-tested data. Therefore, only some simplified distribution conditions of radiation fields of single radiation source under some special circumstances can be provided for reference.

So far, EMC design is still dependant on the experience of EMC engineers or hardware engineers. For engineering design, we have to possess some commonly-used experience about engineering design without having to carry out too much theoretical analysis. Meanwhile, we should use the assistant method such as near-field EMI probes etc to solve EMC problems. The above drawing refers to the distribution drawing of RE indices and specific frequencies measured by the near-field probe.

In the author’s opinion, with regard to EMC problems in PCB, close attention should be paid to the following three aspects:

1)Power supply
2)Clock signal (and other high radiation sources)
3)Interface circuit

For power supply, the integrity of power supply (ground) and the design of power ground as the return path should be taken into account;

The clock as the main EMI source of board contributes more than 60% to EMI;
All efforts for EMC design of the product may be wasted even if only one interface is not well designed.

Comply with the above-mentioned three points, the EMC problems will be understood and solved.

7.Challenges of DFM

To solve DFM problems, a suitable technological process standards is needed and PCB designers have to be provided with comprehensive training about general knowledge of DFM. PCB engineers have to keep pace with the production and processing capacities of PCB in the industry, and select suitable technological lines and design parameters as required by thier company, and compare carefully the advantages and disadvantages between electric performance and DFM. Furthermore, special engineer shall be pointed to creat symbol so that the DFM problems can be solved at the very start.

In Allegro there is a special Library module which can easily creat the PCB footprint as per the datasheet of device. Performance of DFM is dependant on a good symbol.

IV. A perfect tool is first for a superb job

Design of high-performance PCB can not be done without advanced EDA software. SPB from Cadence plays an important role in designing high-speed PCB. Its pre-simulation and after-simulation modules can ensure the quality of signal and promote the one-time success rate of products; physical and electrical constrains driven routing can automatically complete the technical requirements such as differential routing and length match etc. In addition, they are capable of parallel design, and so reduces the time for research and development; able to reuse modules, emphasis the technological accumulation, ensure the design quality and promote the design efficiency.

High-performance EDA software together with experienced PCB design engineers will ensure the design of high-performance PCB a reliable success. EDADOC is devoted to design of high-speed, high-density and high-performance PCB, and becomes a leading company for design of high-performance PCB in China. Please visit www.edadoc.com for detailed information about our Company.